1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly a liquid crystal display (LCD), and especially, to a driver circuit including type LCD in which a thin film transistor (TFT) is formed in a display section and a peripheral section of a panel.
2. Description of the Related Art
In recent years, because advantage of the small size and thickness and low power consumption, an LCD (liquid crystal display) has been put into practice in the field of OA and AV devices. In particular, an active matrix type provided with a TFT, as a switching element for controlling timings for rewriting image data on pixels, realizes motion animation display with a large screen and high resolution, and is therefore used in displays of various television systems, personal computers, and the like.
A TFT is a field effect transistor obtained by forming a semiconductor layer together with a metal layer in a predetermined form, on an insulating substrate. In an active matrix type LCD, a pair of opposing substrates are arranged so as to sandwich liquid crystal therebetween, and one electrode of each of a plurality of capacitors for driving liquid crystal formed between the pair of substrates is connected with a corresponding TFT.
An LCD using polycrystal silicon (p-Si) as a semiconductor layer of TFTs in place of amorphous silicon (a-Si), which had frequently been adopted has been developed, and annealing using a laser beam for growth of grains has been put to use. In general, p-Si has a higher mobility than a-Si so that TFTs can be down-sized and a high aperture ratio and high resolution can be realized. In addition, since it is possible to adopt a gate self-aligning structure by means of using p-Si, fine TFT element is achieved and the parasitic capacitance can be reduced so that higher speed TFTs can be achieved. Consequently, an electrically complementary connection structure, e.g., a CMOS (Complementary Metal Oxide Semiconductor) can be constructed using an n-ch TFT and a p-ch TFT so that a high-speed drive circuit can be formed by adopting p-Si TFT. Since a driver circuit section can therefore be formed to be integral with a display area on the same substrate, the manufacturing costs can be reduced and the LCD module realizes a small size.
As a method of forming a p-Si film on an insulating substrate, there are a recrystallization method by annealing a-Si formed under a low temperature or a solid phase growth method under a high temperature. In any case, the process must be carried out under a high temperature of 900xc2x0 C. or more. Therefore, it is not possible to use a low price glass substrate in view of heat resistance, but a quartz glass substrate of a high price is required, resulting in a high manufacturing cost. In contrast, developments have been made to a method which allows use of a low price glass substrate as an insulating substrate by performing silicon polycrystallization processing at a relatively low temperature of 600xc2x0 C. or less, with use of laser annealing. This kind of method in which the processing temperature is thus 600xc2x0 C. or less throughout all the steps of manufacturing TFTs is called a low-temperature process, and is necessary for mass-production of LCDs at low costs.
FIG. 1 is a plan view showing a relationship between a substrate 1 to be processed and directions of excimer laser irradiation and scanning, in excimer laser annealing (ELA). The substrate 1 to be processed is a popular non-alkaline glass substrate, and a-Si layer is formed on the surface of the substrate. An active matrix substrate 5 include a part of an LCD which includes display area 2 having a parality of pixels arranged in a matrix and gate drivers area 3 and drain drivers area 4 formed in peripheral portions of the display area 2. The substrate 1 is a mother glass substrate including a plurality of the active matrix substrates 5. At each of the display area 2, a pixel electrode as one of the electrodes of a pixel capacitor for driving liquid crystal will be formed such that the electrodes will be formed and arranged in a matrix, and TFTs will be formed so as to be respectively connected with the electrodes. The gate driver 3 will be mainly constructed of a shift register, and the drain driver 4 will be mainly constructed of a shift register and a sample-and-hold circuit. These drivers 3 and 4 will be formed by a TFT array such as CMOS or the like.
The substrate 1 is subjected to ELA to polycrystallize a-Si to form p-Si. The ELA is carried out by irradiating a line beam obtained from a predetermined optical system and by providing the line beam to scanning. Scanning is performed by shifting every laser pulse by a predetermined pitch such that the laser beams runs and draws edge lines as indicated by broken lines C in FIG. 4. However, a p-Si film formed thus by ELA has a problem that a linear region attaining only a low crystallinity where the grain size has not become sufficiently large is formed along a beam line direction. Here, each of TFTs formed on the substrate 1 has a channel length direction and a channel width direction which correspond to either the vertical direction V or the horizontal direction H with respect to the substrate 1.
As shown in FIG. 2, the TFT formed on the substrate 1 is constituted such that a gate electrode 13 is provided on an island-like channel region CH of a p-Si film with a gate insulating film inserted therebetween. Regions LD where impurities are doped at high and low densities in P-Si are provided respectively on both sides of the channel region CH. Further, source and drain regions S and D are respectively formed outside the LD regions. A defective crystallization region linearly extending along the longitudinal direction of the line beam as described above will be positioned in the channel length direction L or the channel width direction W where an island-like TFT is formed. In particular, when such a defective crystallization region extends in the channel width direction W, the defective crystallization region remains in the direction, as indicated by reference R in FIG. 2, perfectly crossing a carrier path connecting the source and drain regions S and D with each other. Since the defective crystallization region R has a high resistance, the ON current is lowered if it exists between the source and drain regions S and D. As a result, problems appear in that the contrast ratio is lowered at the display areas and erroneous operations are caused at the drive circuit sections.
FIG. 3 shows an irradiation light intensity distribution with respect to positions in the line beam as described above. An optical system for generating a line beam is provided with a slit for adjusting the line width and a slit for adjusting the line length, to form a band-like line beam. Thus, since the line width [a] of the line beam is defined by the slits for adjusting the line width, the irradiation light intensity distribution of the line beam has substantially sharp edges and a flat intensity peak portion, as shown in FIG. 3. However, at regions A and B in FIG. 3, the intensity is very high or low and is thus quite different from the intensity at the flat portion.
Regions B where the intensity distribution has a positive or negative inclination other than right angles are considered to have been caused since short wavelength components of laser light are diffracted at the edge portions of the slit for adjusting the line width. In addition, the region A where the intensity shows a sharp peak is considered to have occurred since laser light is shielded, diffracted, or interfered with due to foreign material or the like sticking to lenses forming part of the optical system, so that unevenness in light intensity is caused and the uneven light is converged in the line width [a] direction and expanded in the line length direction. Even a slight amount of foreign material which may thus cause unevenness in light intensity, if it exists in a clean room, will be a factor which influences optical characteristics and damages the flat characteristic of the intensity distribution.
FIG. 4 shows a relationship between the laser energy and the grain size where a-Si is crystallized to form p-Si by ELA. It is apparent from this figure that the grain size is smaller if the energy is smaller or greater than an optimal energy Eo as a peak. Where the grain size of at least r or more is desired, the energy must be within the range of Ed to Eu. In FIG. 3, the light intensity is Io When the energy is Eu, and the light intensities are Id and Iu when the energy is Ed and Eu, respectively. Therefore, in the region denoted at A where the light intensity is higher than the light intensity Iu or in the region denoted by B where the intensity is lower than Id, the grain size attained is not sufficiently large and it is thus impossible to obtain a desired value r.
For example, in the example of FIG. 1, a line beam irradiated has a line width of 0.5 to 1.0 mm and a line length of 80 to 150 mm. Hence, laser light can be irradiated over the entire area by scanning the substrate 5 to be processed with this line beam a so that a large area can be processed. At the same time, however, a defective crystallization region is linearly formed along the line length direction of the beam at such a portion of the semiconductor film of the substrate which corresponds to the region A or B shown in FIG. 3. As a result, a plurality of defective crystallization regions appear like stripes on the entire substrate 1.
The present invention has been made to solve the problems as described above and is constructed so as to provide a method for manufacturing a semiconductor device comprising a plurality of transistors each including: a polycrystal semiconductor film patterned like an island and obtained by polycrystallizing an amorphous semiconductor film formed on a substrate, by irradiating a laser beam onto the amorphous semiconductor film; an insulating film formed on a channel region of the polycrystallized semiconductor film; a gate electrode formed corresponding to the channel region with the insulating film therebetween; a source region and a drain region formed in the polycryatallized semiconductor film, such that the channel region is formed between the source and drain regions; a source electrode connected to the source region; and a drain electrode connected to the drain region,
wherein the laser beam is irradiated onto the amorphous semiconductor film such that the laser beam has edge line directions on an irradiated region on the amorphous semiconductor film, which are not perpendicular to a channel length direction and a channel width direction of the channel region.
In this structure, even if a linear region not sufficiently crystallized appears in the semiconductor film due to unevenness in intensity of the irradiated laser beam, such a defectively crystallized region does not perfectly cross carrier paths in a channel of a TFT, and it is therefore possible to prevent the ON-current of the TFT from being decreased due to formation of a high-resistance region in the channel section of the TFT.
In addition, according to the present invention, the laser beam is a line beam obtained by shaping laser light emitted from a laser oscillation source, into a belt-like line, by means of a predetermined optical system consisting of a combination of a plurality of lenses.
In this structure, a linear defective crystallization region formed at a portion within a line beam where the intensity distribution of the line beam is not formed crossing the channel region. Therefore, a high-resistance region does not exist in the carrier path of the TFT, and the ON-current of the semiconductor element is prevented from being decreased.
Consequently, it is possible to prevent problems such as lowered contrast at the display area of an LCD, operation errors in the peripheral circuit section, and the like.
The line beam has a line length direction extending at an angle of 45xc2x0 to at least one of the channel length direction and the channel width direction of the channel region.
Hence, a linear defective crystallization region generated due to unevenness in intensity of the line beam is always positioned at an angle of 45xc2x0 to the carrier path so that the defective crystallization region does not cross the polycrystal semiconductor layer. The carrier path is therefore prevented from being completely divided to increase resistance using the defective crystallization region.